1 |
AZP92 |
ECL/PECL ±1, ±2 Clock Generation Chip with Selectable Enable
|
122K |
|
|
2 |
AZP92 |
ECL/PECL ±1, ±2 Clock Generation Chip with Selectable Enable
|
109K |
|
|
3 |
AZP92 |
ECL/PECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
122K |
|
|
4 |
AZP92 |
ECL/PECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
175K |
|
|
5 |
AZP92_09 |
ECL/PECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
175K |
|
|
6 |
AZP92_12 |
PECL/ECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
501K |
|
|
7 |
AZP92NAG |
ECL/PECL ±1, ±2 Clock Generation Chip with Selectable Enable
|
122K |
|
|
8 |
AZP92NAG |
ECL/PECL ±1, ±2 Clock Generation Chip with Selectable Enable
|
109K |
|
|
9 |
AZP92NAG |
ECL/PECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
175K |
|
|
10 |
AZP92NAG |
ECL/PECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
122K |
|
|
11 |
AZP92NAG |
PECL/ECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
501K |
|
|
12 |
AZP92X |
ECL/PECL ±1, ±2 Clock Generation Chip with Selectable Enable
|
122K |
|
|
13 |
AZP92X |
ECL/PECL ±1, ±2 Clock Generation Chip with Selectable Enable
|
109K |
|
|
14 |
AZP92X |
ECL/PECL ÷1, ÷2 Clock Generation Chip with Selectable Enable
|
122K |
|
|