1 |
74HC74 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
123K |
|
![4336466](/2012/images/PDF.gif) |
2 |
74HC74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476287](/2012/images/PDF.gif) |
3 |
74HC7403 |
4-Bit x 64-word FIFO register; 3-state
|
167K |
|
![4336465](/2012/images/PDF.gif) |
4 |
74HC7403D |
4-Bit x 64-word FIFO register; 3-state
|
167K |
|
![4336464](/2012/images/PDF.gif) |
5 |
74HC7403D-T |
x4 Asynchronous FIFO
|
564K |
|
![3899258](/2012/images/PDF.gif) |
6 |
74HC7403N |
4-Bit x 64-word FIFO register; 3-state
|
167K |
|
![4336463](/2012/images/PDF.gif) |
7 |
74HC7404 |
5-Bit x 64-word FIFO register; 3-state
|
134K |
|
![4336462](/2012/images/PDF.gif) |
8 |
74HC7404D |
5-Bit x 64-word FIFO register; 3-state
|
134K |
|
![4336461](/2012/images/PDF.gif) |
9 |
74HC7404N |
5-Bit x 64-word FIFO register; 3-state
|
134K |
|
![4336460](/2012/images/PDF.gif) |
10 |
74HC74BQ |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
123K |
|
![4336459](/2012/images/PDF.gif) |
11 |
74HC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
123K |
|
![4336458](/2012/images/PDF.gif) |
12 |
74HC74D |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476286](/2012/images/PDF.gif) |
13 |
74HC74DB |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
123K |
|
![4336457](/2012/images/PDF.gif) |
14 |
74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476285](/2012/images/PDF.gif) |
15 |
74HC74DR2 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476284](/2012/images/PDF.gif) |
16 |
74HC74DR2G |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476283](/2012/images/PDF.gif) |
17 |
74HC74D-T |
Dual D-Type Flip-Flop
|
121K |
|
![3899254](/2012/images/PDF.gif) |
18 |
74HC74DTR2 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476274](/2012/images/PDF.gif) |
19 |
74HC74DTR2G |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
|
136K |
|
![2476273](/2012/images/PDF.gif) |
20 |
74HC74N |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
123K |
|
![4336456](/2012/images/PDF.gif) |
21 |
74HC74PW |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
123K |
|
![4336455](/2012/images/PDF.gif) |